Technical Field
The present invention relates to the field of integrated circuit technologies, and in particular, to a structure of a multi-mode supported and configurable six-input look-up table (LUT), and a field-programmable gate array (FPGA) device.
Related Art
A field-programmable gate array (Field-Programmable Gate Array, FPGA) is a logical device having rich hardware resources, powerful parallel processing capabilities, and flexible reconfigurability. The FPGA has been widely applied in many fields such as data processing, communications, and networks due to these features.
A look-up table (Look-up table, LUT) is a main element of a modern FPGA device and the LUT is substantially a random-access memory (Random-Access Memory, RAM). At present, most FPGAs use 4-input LUTs and each LUT may be regarded as a 16x1 RAM with a 4-bit address line. After a user describes a logic circuit by using a conceptual diagram or an HDL language, FPGA development software computes all possible results of the logic circuit automatically and writes the results into an RAM. In this case, each time inputting a signal to perform a logic operation is equivalent to inputting an address to look up a table, content corresponding to the address is searched for, and then the content is output.
As an application system is enhanced in functions and is increased in scale, the required number of gate arrays of a programmable logical device increases day by day, for example, a wide range of applications of FPGAs with thousands of gate levels. The increase in the number of the gates of the FPGA brings a strengthened function implementation capabilities and enhanced functions, but incurs performance degradation of the FPGA correspondingly, such as an increase in chip area, an increase in power consumption, and speed reduction, which all restrict the performance of the entire system. Therefore, it not only requires a reduction in process dimensions and an increase in the number of gate arrays, but also requires improvement of application capabilities of all logical blocks.
Improvement of flexibility, logic implementation capabilities and computing capabilities of the LUT may effectively improve the utilization of cabling resources, reduce the area occupied by resources, and further improve the operating speed of a chip, thereby implementing more functions and applications by using limited resources.